CMOS OP-AMP: The Scaling Effect

Scaling means systematic reduction of overall dimensions of the MOSFET device as allowed by the available technology while preserving the long channel behavior and scaling laws are used as guides to MOSFET miniaturization. Scaling depends on four parameters - supply voltage, lateral dimensions, vertical dimension and substrate doping concentration. The last two parameters are called process parameters and its scaling are tedious. The book consists only first two parameters and analyze it. The first part contains effect of supply voltage reduction on the parameters of CMOS operational amplifier with different scaling laws. And the second part contains effect of channel length reduction on the parameters of CMOS operational amplifier while keeping the same aspect ratio. From second part we can say that for a given technology and an architecture of CMOS Op-Amp, if the maximum silicon area is the constraints so within this area, what are the best possible specifications of an Op-Amp? And also if the specifications of an Op-Amp are given, what is the area it will consume? The design is implemented in the range of 0.35 m to 3.5 m technology using 3.3V as power supply.

Autorentext

Umar Faruque Khan has obtained his M.Tech degree in VLSI Design at NIRMA University in 2009. Since then he has worked in CEERI Pilani in different projects in the field of Analog Design. He is working as a Physical IC Design Engineer at SmartPlay Technologies. He is the author of several articles published in reputed journals.