Design and Development of Network Protocol in FPGA
Details
The increasing popularity of the Internet stimulates an explosive growth of the data transmitted on the Internet as well as the dramatic increase of the transmission speeds. As a result the TCP/IP processing has become a bottleneck. Traditional software based TCP/IP processing on general purpose processors (GPPs) is no longer able to keep pace with network wire speeds. Consequently, there is an urgent need to design performance-critical TCP/IP functions as special units to accelerate the processing speeds and to offload the processing tasks from GPPs. Such functional units performing micro-level functions can be implemented on field - programmable gate arrays (FPGAs.) FPGAs as programmable hardware devices are particularly suitable to encompass both high processing speeds and flexibility to meet the quickly changing Internet. A challenge in designing the TCP/IP function is that the demand for advanced services requires the network devices to support a wide range of application and protocols; however this application and protocols are constantly evolving.
Autorentext
Pan Mahesh B Dembrani uzyskä tytu magistra in yniera elektroniki cyfrowej na Uniwersytecie Amravati w Amravati. Posiada 10-letnie do wiadczenie w nauczaniu i badaniach naukowych. Obecnie zajmuje si przetwarzaniem sygnäów, ze szczególnym uwzgl dnieniem zastosowä medycznych i komunikacyjnych.
Weitere Informationen
- Allgemeine Informationen
- GTIN 09783659880803
- Genre Electrical Engineering
- Anzahl Seiten 56
- Herausgeber LAP LAMBERT Academic Publishing
- Gewicht 102g
- Größe H220mm x B150mm x T4mm
- Jahr 2016
- EAN 9783659880803
- Format Kartonierter Einband
- ISBN 3659880809
- Veröffentlichung 05.05.2016
- Titel Design and Development of Network Protocol in FPGA
- Autor Mahesh Dembrani , Vinit Patel , Anupkumar Jayaswal
- Sprache Englisch