Logic Circuit Design

This book covers combinational circuits, latches, and asynchronous sequential circuits, reviewing orthodox and unorthodox approaches to circuit design, exploring the theory of latches and examining asynchronous circuits in tree specification.

In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard.

The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition.

Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits.

Asynchronous circuits are specified in a tree-representation, each internal node of the tree representing an internal latch of the circuit, the latches specified by the tree itself. The tree specification allows solutions of formidable problems such as algorithmic state assignment, finding equivalent states non-recursively, and verifying asynchronous circuits.

Presents fundamentally new methods for circuits Covers combinational circuits, latches and asynchronous sequential circuits Based on the successful monograph Switching Theory by the same author Includes supplementary material: sn.pub/extras

Inhalt
Logic Variables, Logic Formulas, Karnaugh Maps, Reduced Karnaugh Maps.- Tautologies, Propositional Logic.- Canonical and Shegalkin Normal Forms, Minimising Logic Functions, Composition of Circuits.- Theory of Latches, Automata Models, Asynchronous Sequential Circuits, Verifying a Sequential Design.