Low Power Delta-Sigma ADC on Silicon-On-Sapphire

The technologically advancements of the chip
fabrication and VLSI circuit design have propelled
the concept of a system on chip. The unique
architecture of the Delta-Sigma A/DC requiring both
the modulator and the decimation filter on the same
chip to reduce the power dissipation has directly
benefited from these developments. The architectural
advantage of the Delta-Sigma A/DC is its
insensitivity to process variation allowing for
resolution in excess of 20-bit by adjusting
oversampling ratio, modulator order, and/or quantizer
dimension. Moreover, recently available thin-film
SOI/SOS processes provide excellent potential for
circuit isolation and zero or negligible junction
capacitors. The 2-3 times lower digital power
consumption than the bulk processes and higher Q
inductors of SOI/SOS attract applications in
telecommunication and remote sensing areas, along
with other applications that depend heavily on
maintaining low power dissipation.

Autorentext
Chia-Ming Liu received the Ph.D. degree from the Oklahoma State
University in 2002. From 2002 to 2008, he was a Research
Associate working on the high temperature mixed signal ASIC
designs. Currently, he is a Principle Engineer of Honeywell in
Redmond, WA where he is working on the mixed-signal ASIC designs
for MEMS inertial sensors.