FPGA implementation of RISC controller

A description of high performance 16-bit Microcontroller based on the Reduced Instruction Set Computer (RISC) design concept is presented in this book. The objective is to design a general-purpose RISC Microcontroller, modular design and bottom-up implementation of this RISC microcontroller implemented on a Field Programmable Gate Arrays (FPGAs). Microcontroller implemented the arithmetic logic unit, shifter, comparators, multiplier, divider and control unit. Microcontroller includes 16-bit register file having a dedicated arithmetic logic unit (ALU), In addition to a general purpose 16-bit arithmetic logic unit. The arithmetic logic unit provides certain arithmetic and logical functions. The RISC processor has the Harvard architecture, which uses separate memory access ports for program and data.The microcontroller can execute 54 instructions such as add, subtract, multiply, divide, load and store. Each instruction will take a three basic step to execute the instruction fetch, decode and execute.

Autorentext

Abhishek choubey and Shruti bhargava choubey is working as associate professor in the department of Electronics communication engineering at Sreenidhi institute of science & technology, Hyderabad, India. They have published nearly 80 papers in international journal and conference.