Gate leakage variability in nano-CMOS transistors

Gate leakage variability in nano-scale CMOS devices is investigated through advanced modelling and simulations of planar, bulk-type MOSFETs. The motivation for the work stems from the two of the most challenging issues in front of the semiconductor industry - excessive leakage power, and device variability - both being brought about with the aggressive downscaling of device dimensions to the nanometer scale. The aim is to deliver a comprehensive tool and understanding for the assessment of gate leakage variability in realistic nano-scale CMOS transistors. The book describes a 3D modelling and simulation framework for the study of device variability, and presents a case study of gate leakage variability in a 25 nm square gate n-type MOSFET, taking into account the combined effect of random dopant fluctuations and oxide thickness fluctuations. An important chapter is dedicated to the analysis of the non-abrupt band-gap and permittivity transition at the Si/SiO2 interface, and reveals a strong impact on subband quantisation, and enhancement of capacitance and leakage, relative to simulations with an abrupt band-edge transition at the interface.

Autorentext

Stanislav Markov is a research associate in the Department of Electronics and Electrical Engineering at the University of Glasgow, UK. His work on statistical variability in nano-scale electron devices investigates the impact that discreteness of charge and matter have on the performance and leakage characteristics of such devices.