Introduction to Formal Hardware Verification

Hardware verification is a hot topic in circuit and system design due to rising circuit complexity. This advanced textbook presents an almost complete overview of techniques for hardware verification. It covers all approaches used in existing tools, such as binary and word-level decision diagrams, symbolic methods for equivalence checking, and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness. It enables the reader to understand the advantages and limitations of each technique. Each chapter contains an introduction and a summary as well as a section for the advanced reader. Thus a broad audience is addressed, from beginners in system design to experts.

Comprehensive overview of methods and tools for designing correct circuits and systems Covers all approaches used in current hardware verification techniques Structured as a textbook with introductions and summaries for every chapter and numerous examples and illustrations Includes supplementary material: sn.pub/extras

Inhalt
1 Introduction.- 2 Boolean Functions.- 3 Approaches Based on Finite State Machines.- 4 Propositional Temporal Logics.- 5 Higher-Order Logics.- Appendix A Mathematical Basics.- Appendix B Axioms and Rules for CTL*.- Appendix C Axioms and Rules for Higher Order Logic.- References.