Phase-Locked Loops for Wireless Communications

This book is intended for the graduate or advanced undergraduate engineer. The primary motivation for writing the text was to present a complete tutorial of phase-locked loops with a consistent notation. As such, it can serve as a textbook in formal classroom instruction, or as a self-study guide for the practicing engineer. A former colleague, Kevin Kreitzer, had suggested that I write a text, with an emphasis on digital phase-locked loops. As modem designers, we were continually receiving requests from other engineers asking for a definitive reference on digital phase-locked loops. There are several good papers in the literature, but there was not a good textbook for either classroom or self-paced study. From my own experience in designing low phase noise synthesizers, I also knew that third-order analog loop design was omitted from most texts. With those requirements, the material in the text seemed to flow naturally. Chapter 1 is the early history of phase-locked loops. I believe that historical knowledge can provide insight to the development and progress of a field, and phase-locked loops are no exception. As discussed in Chapter 1, consumer electronics (color television) prompted a rapid growth in phase-locked loop theory and applications, much like the wireless communications growth today. xiv Preface Although all-analog phase-locked loops are becoming rare, the continuous time nature of analog loops allows a good introduction to phase-locked loop theory.

Klappentext

This is a contemporary reference work on phase-locked loops for wireless communications engineers. The coverage is comprehensive and includes summary chapters on the circuit theory needed to explain the theory and operation of phase-locked loops and the supporting mathematics necessary for analysis. These include concise discussions of Laplace transformations, z-Transformations, root locus, Bode analysis, partial fraction expansion, and others. The material develops systematically from analog through digital loops. Included is broad coverage of synchronization methods and techniques, modern digital interpolation techniques in modem design, modem acquisition and tracking, fading channel performances, as well as practical rules-of-thumb for modem designers to use in specifying loop bandwidths for good performances. The book provides numerous real world applications, and each chapter has problem sets that reinforce important concepts presented. Phase-Locked Loops for Wireless Communications: Digital and Analog Implementations features a complete collection of topics needed by both the wireless and traditional phase-locked loop specialist to design and analyze high performance circuits and software algorithms.

Inhalt
1 The Early History of Phase-Locked Loops.- 1.1 History.- 1.2 References.- 2 Analog Phase-Locked Loops.- 2.1 Time Domain Analysis of Phase-Locked Loops.- 2.2 Frequency Domain Analysis of Phase-Locked Loops.- 2.3 Partial Fraction Expansion.- 2.4 First Order Loop Responses.- 2.5 Definition of Loop Order.- 2.6 Second Order Phase-Locked Loops.- 2.7 Third Order Phase-Locked Loops.- 2.8 References.- 2.9 Problems.- 3 Root Locus and Frequency Analysis.- 3.1 Root Locus.- 3.2 Frequency Analysis.- 3.3 FM Demodulator.- 3.4 Noise Bandwidth.- 3.5 Third Order Phase-Locked Loop Design.- 3.6 References.- 3.7 Problems.- 4 Acquisition and Tracking.- 4.1 First Order Acquisition.- 4.2 Second Order Loop Acquisition.- 4.3 Acquisition in Noise.- 4.4 Frequency Sweeping.- 4.5 Acquisition Summary.- 4.6 Summary of Analog Phase-Locked Loop Design Equations.- 4.7 References.- 4.8 Problems.- 5 Digital Transforms.- 5.1 The Pulse Transform.- 5.2 Z Transform.- 5.3 Inverse Z-Transform.- 5.4 Partial Fraction Expansion.- 5.5 Synthetic Division.- 5.6 Modified Z-Transform.- 5.7 Zero Order Hold.- 5.8 References.- 5.9 Problems.- 6 Digital Closed Loop Analysis.- 6.1 Loops With Samplers.- 6.2 Multirate Sampling.- 6.3 References.- 6.4 Problems.- 7 Digital Transformations of Analog Phase-Locked Loops.- 7.1 Analog Loop Transformations.- 7.2 All Digital Loops With Block Elements.- 7.3 Loop Filter Transformations.- 7.4 VCOs.- 7.5 Complete Digital PLL Equations.- 7.6 References.- 7.7 Problems.- 8 Stability and Frequency Response of Digital Loops.- 8.1 Stability.- 8.2 Noise Bandwidth of Digital Phase-Locked Loops.- 8.3 Sampling Rate Effect Upon Loop Bandwidth.- 8.4 References.- 8.5 Problems.- 9 All Digital Phase-Locked Loops.- 9.1 Non-Uniform Sampling.- 9.2 Noise Analysis of the Second Order Loop.- 9.3 Noise Bandwidthof First Order Loops.- 9.4 Components of Digital Phase-Locked Loops.- 9.5 Phase Detectors.- 9.6 References.- 9.7 Problems.- 10 Digital PLL Responses and Acquisition.- 10.1 Linearized Input Responses.- 10.2 Nonlinear Analysis.- 10.3 Phase Plane Analysis.- 10.4 Phase Error Variance.- 10.5 Probability of Acquisition.- 10.6 Probability of Cycle Slip.- 10.7 Nonlinear Analysis of Second Order Loops.- 10.8 Acquisition for Non-Uniform Sampling Phase-Locked Loops.- 10.9 References.- 10.1 Problems.- 11 Synchronizers for Digital Communications.- 11.1 The Synchronization Problem.- 11.2 BPSK and QPSK Synchronization.- 11.3 Lock Detectors.- 11.4 Costas Loops.- 11.5 Timing Synchronizers.- 11.6 Interpolators.- 11.7 References.- 11.8 Problems.- 12 Phase Noise Analysis.- 12.1 Introduction to Phase Noise.- 12.2 Phase Noise in Phase-Locked Loops.- 12.3 Phase Noise of Oscillators.- 12.4 Phase Noise of Dividers.- 12.5 Consequences of Phase Noise.- 12.6 Phase Noise Measurements.- 12.7 References.- 12.8 Problems.- Appendix A Laplace Transforms.- Appendix B Z Transforms.