VLSI Design and Test for Systems Dependability

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Details

Is the first book to focus on the new roles VLSI is taking for the safe, secure, and dependable design and operation of electronic systems

Contributes to a better understanding of threats against safe and secure systems and how to mitigate them by advanced design and testing of VLSI as core components

Describes specific applications of design and testing for dependability in real-world applications such as controls for robots and vehicles, wireless communications, system of systems, and the Internet of Things (IoT)

Inhalt
Challenges and Opportunities in VLSI for Systems Dependability.- Design and Development of Electronic Systems for Quality and Dependability.- Radiation-Induced Soft Errors.- Electromagnetic Noises.- Variations in Device Characteristics.- Time-Dependent Degradation in Device Characteristics.- Connectivity in Wireless Telecommunications.- Connectivity in Electronic Packaging.- Responsiveness for Hard Real Time Control.- The Role of Security LSI and the Example of Malicious Attacks.- Verification and Test Coverage.- Unknown Threats and Provisions.- Design Automation for Reliability.- Formal Verification and Debugging of VLSI Logic Design for Systems Dependability:Experiments and Evaluation.- Virtualization: System-Level Fault Simulation of SRAM Errors in Automotive Electronic Control Systems.- DART A Concept of In-Field Testing for Enhancing System De-pendability.- Design of SRAM Resilient against Dynamic Voltage Variations.- Design and Applications of Dependable Non-Volatile Memory Systems.- Network-on-Chip Based Multiple-Core Centrized ECUs for Safety-Critical Automotive Applications.- An On-Chip Router Architecture for Dependable Multicore Processor.- Wireless Interconnect in Electronic Systems.- Wireless Power Delivery Resilient against Loading Variations.- Extended Dependable Air: Use of Satellites in Boosting Dependability of PublicWireless Communications.- Responsive Multithreaded Processor for Hard Real-Time Robotic Applications.- A Low-Latency DMR Architecture with Fast Checkpoint Recovery Scheme Using Simultaneously Copyable SRAM.- A 3D-VLSI Architecture for Future Automotive Visual Recognition.- Applications of Reconfigurable Processors as Embedded Automatons in the IoT Sensor Networks in Space.- An FPGA Implementation of Comprehensive Security Functions for Systems-Level Authentication.- SRAM-Based Physically Unclonable Functions (PUFs) to Generate Signature out of Silicon for Authentication and Encryption.

Weitere Informationen

  • Allgemeine Informationen
    • GTIN 09784431568636
    • Genre Elektrotechnik
    • Auflage Softcover reprint of the original 1st edition 2019
    • Editor Shojiro Asai
    • Sprache Englisch
    • Lesemotiv Verstehen
    • Anzahl Seiten 820
    • Größe H235mm x B155mm x T44mm
    • Jahr 2019
    • EAN 9784431568636
    • Format Kartonierter Einband
    • ISBN 4431568638
    • Veröffentlichung 26.01.2019
    • Titel VLSI Design and Test for Systems Dependability
    • Gewicht 1218g
    • Herausgeber Springer Japan

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