A Subthreshold Reconfigurable Architecture for Harsh Environment

This book provides, for the first time, an extensive study of the ultra low power electronics field with radiation fault tolerance for VLSI design in reference with design and application proposed. It discusses the fundamental principles and circuits for ultra low power electronic design and their implementations with various energy scavenging techniques. A recent trend in IC design is to forego unbridled performance in lieu of increased energy efficiency specifically for battery-powered applications like mobile electronics, temperature-sensitive MEMS) and implanted bio-medical devices. Low power consumption and radiation hardness are generally competing requirements for space electronics as well as for many Earth-bound high reliability applications. The book presents a unique, unifying view of ultra low power digital electronics in synchronous and asynchronous domain with emphasizes on the use of the subT regime of transistor operation to achieve ultra low power consumption. The book also includes a chapter on the future of energy and logic design using next generation devices. This book intent is to serve as reference for Post graduate students, research scholars and faculties.

Autorentext

Dr. Ameet Chavan has over 15 years of combined experience in industry and academia. Received B.E degree from AVCOE-Pune University, India in 1998, M.S and Ph.D degree from University of Texas at El Paso (UTEP) in 2003 and 2010. Worked for following institutions and companies - Bull Power Systems, UTEP, Intel, AMD, Echostar, Global XT and SNIST.