AHB Arbiter in AMBA bus With Effective Arbitration Logic for DMA

The AMBA on- chip bus is an established, open specification that serves as a framework for System-on-chip (SoC) designs.Resolution is a big issue in SOC(System On Chip) while dealing with number of masters trying to sense a single data bus.The effectiveness of a system to resolve this priority resides in its ability to logical assignment of the chance to transmit data width of the data,response to the interrupts etc. The book is about the typical AMBA features of single clock edge transition, split transaction, several bus masters,and burst transfer.The reconfigurable arbitration algorithm, such as highest priority or fair access and round robin can be implemented depending on the application requirements.This book is organised in such a way that chapter 2 contains about AMBA specification, that deals with the different available buses with AMBA specifications among them how to chose a appropriate system bus for our design.Chapter 3 describes about the arbiter it deals with the need of an arbiter and about arbitration algorithms.Chapter 4 describes each signal involved in this process and their logic. Chapter5 describes AHB operation with timing cycles.chapter 6,7 includes DMA.

Autorentext

P Gouthami is an Assistant Professor in the department of Electronics and Communication Engineering. She received her B.Tech degree from Bhojreddy college of engineering for women and M.Tech degree from TKR college of Engineering and Technology. She has a teaching experience of 4 years & Her research interests include digital design & VLSI.