Chiplet Design and Heterogeneous Integration Packaging

The book focuses on the design, materials, process, fabrication, and reliability of chiplet design and heterogeneous integraton packaging. Both principles and engineering practice have been addressed, with more weight placed on engineering practice. This is achieved by providing in-depth study on a number of major topics such as chip partitioning, chip splitting, multiple system and heterogeneous integration with TSV-interposers, multiple system and heterogeneous integration with TSV-less interposers, chiplets lateral communication, system-in-package, fan-out wafer/panel-level packaging, and various Cu-Cu hybrid bonding. The book can benefit researchers, engineers, and graduate students in fields of electrical engineering, mechanical engineering, materials sciences, and industry engineering, etc.

Addresses chiplet design and heterogeneous integraton packaging both in theory and practice Provides studies in design, materials, process, fabrication, and reliability of various chiplet designs Written by a veteran in the area

Autorentext
For Internal Use Only:
John H Lau, Ph.D., P.E., IEEE Fellow, ASME Fellow, IMAPS Fellow

Unimicron Technology Corporation, John_Lau@unimicron.com

SPECIALIZED PROFESSIONAL COMPETENCIES

[1] Design, analysis, materials, process, manufacturing, qualification, reliability, testing, and thermal management of electronic and optoelectronic components and systems. Fan-out/fan-in WLP, MEMS, LED, CIS, TSV, 3D IC integration, heterogeneous integration/SiP and SMT. Leadfree soldering, manufacturing, and solder joint reliability.

[2] Manage R&D teams to develop new and useful technologies for semiconductor advanced packaging.

[3] Provide recent advances and trends in advanced packaging to upper managements and guidance to young engineers and managers.

Over 22 books (all are the first author), 517 peer-reviewed papers (out of which 375 are principal investigator), 40 issued and pending US patents (out of which 25 are principal inventor), and 325 keynotes/lectures.

Inhalt
State-of-the-Art of Advanced Packaging.- Chip Partition and Chip Split.- Multiple System and Heterogeneous Integration with TSV Interposers.- Multiple System and Heterogeneous Integration with TSV-Less Interposers.- Chiplets Lateral (Horizontal) Communications.- Cu-Cu Hybrid Bonding.