CMOS Technology

The technology is scaling down at a significant rate; the major challenge is to design differential amplifier in nanoscale technology with best performance parameters. MOSFET technology is scaling down to meet the performance, cost, and power requirements of the upcoming high throughput applications. Scaling of conventional MOSFET may be difficult further, the technology node due to uncontrollable short- channel effects and excessive threshold voltage variation. Therefore, novel transistor structures have been investigated to sustain continued scaling. CNFET and FinFET have a lot of potential to replace the existing bulk MOSFET technology in the future. As one of the promising new devices, CNFET eliminates most of the fundamental limitations of traditional silicon devices. FinFET is the most attractive choice among the double-gate transistor architectures because of the self-alignment of the two gates and the similarity of the fabrication steps to the existing standard MOSFET technology.

Autorentext

Mr. Aniket U.VikheDept. of ECE, Om Parkash Jogender Singh University, Churu (Raj.) and Assistant Professor, Dept. of E & TC, Dr.VithalraoVikhe Patil College of Engineering, Ahmednagar (Maharashtra).IndiaDr. Suman RaniAssociate Professor, Dept.of ECE, Om Parkash Jogender Singh University, Churu (Raj.) India