Design and Implementation of Reversible Vedic Division by Direct Flag

Vedic division is more expedient and precise than other division techniques now in use. The Direct Flag method, one of the general Vedic division techniques, is the subject of this book. One of the main factors influencing VLSI design is power dissipation. There is no information loss and very little power loss when using these reversible gates. This book provides a design for reversible Vedic division using the Direct Flag approach, with BCD-based inputs and outputs. After that, the suggested methodology is contrasted with the current methods. In terms of quantum cost and garbage output, a significant improvement has been seen.

Autorentext

Dr. Saranya K and Mr. Gnanaprakasam D are working as Assistant Professors in Department of Electrical and Electronics Engineering, Dr. Mahalingam College of Engineering and Technology, Pollachi, India. Dr. Balamanikandan A is working in Department of Electronics and Communication Engineering, Sree vidyanikethan engineering college, Tirupati, India.