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Design for AT-Speed Test, Diagnosis and Measurement
Details
Design for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a `must read' before any DFT is attempted.
Klappentext
emDesign for AT-Speed Test, Diagnosis and Measurement/em is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a `must read' before any DFT is attempted.
Inhalt
Technology Overview.- Memory Test and Diagnosis.- Logic Test and Diagnosis.- Embedded Test Design Flow.- Hierarchical Core Test.- Test and Measurement for PLLs and ADCs.- System Test and Diagnosis.- System Reuse of Embedded Test.
Weitere Informationen
- Allgemeine Informationen
- GTIN 09781475782912
- Genre Elektrotechnik
- Auflage 2000
- Editor Benoit Nadeau-Dostie
- Sprache Englisch
- Lesemotiv Verstehen
- Anzahl Seiten 260
- Größe H254mm x B178mm x T15mm
- Jahr 2013
- EAN 9781475782912
- Format Kartonierter Einband
- ISBN 1475782918
- Veröffentlichung 26.04.2013
- Titel Design for AT-Speed Test, Diagnosis and Measurement
- Untertitel Frontiers in Electronic Testing 15
- Gewicht 496g
- Herausgeber Springer US