Design of a Java Simulator for Fast Prototyping of System-on-chip

This book presents an alternative to the SystemC library for the rapid prototyping of systems-on-chip in order to view the behavior of TLM platforms avoiding preconceived ideas and stereotypes of SystemC. First, the constraints imposed on the implementation of a transactional model in a simulator are identified. Then, a library from the Java language for writing transaction-level models is defined. The mechanism of Java threads is particularly suited for this study. Thus, the designed simulator, called JTLM, demonstrates the ability to model transactional models without using SystemC. The behavior of platforms made with JTLM is analyzed through a case study. Finally, some solutions to existing problems in SystemC using the new execution model JTLM are given.

Autorentext

Nabila Abdessaied is a Tunisian-born computer scientist. She obtained the engineering degree, the master degree, and the PhD degree in computer sciences in 2007, 2009, and 2015, respectively. Currently, she is working as a researcher at the German Research Center for Artificial Intelligence (DFKI).