Design of High Speed 32-Bit Floating Point FFT Processor using FPGA

The Discrete Fourier Transform (DFT) is used in a wide variety of Digital Signal Processing applications. The algorithm used to implement this transform requires intensive arithmetic computation as well as complex control and sequence functions.The designer of VLSI components is faced with problem of identifying requirements and architectures for FFT algorithm which directly support the DFT. Design goals of this book includes 32-bit floating point FFT calculation in IEEE 754 single Precision number format with very high speed. This book focuses on design, simulation, synthesis and implementation of 32-bit Floating point FFT algorithm in Radix 2 DIT form implemented on virtex II pro FPGA. FPGAs as programmable hardware devices are particularly suitable to encompass both high processing speeds and flexibility to meet the quickly changing DSP designs. Particularly, this book has revealed that the FFT algorithm for DSP-based systems can be efficiently implemented by using Virtex II Pro FPGA with a high speed.

Autorentext

Mr. Ravindra D Badgujar is working as an Assistant Professor in department of E&TC at R C Patel Institute of Technology, Shirpur, MS India. He completed his graduation in E&TC and post graduation in Digital Electronics. He has teaching experience of more than 12 years and pursuing PhD in Electronics Engg. in retinal image processing.