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Design & Implementation of High Performance Face Recognition System
Details
In this book, we have proposed a novel hardware architecture for face-recognition system. In order to make the system cost effective we have used a simple yet efficient algorithm of face-recognition system. We have designed, implemented and verified the algorithm in a cyclone III Field Programmable Gate Array (FPGA) chip. Altera DE0 development board which contains a cyclone III chip on it have been used for debugging purpose. We have also ensured for low power consumption such that the chip could be used universally in a wide range of security systems. To develop a simple yet efficient face recognition algorithm (such as PCA, FFT etc.) on digital hardware, we have researched on various face recognition algorithms using Matlab codes and studied their detection efficiency under various posture and background and also the complexity of the algorithm. To save hardware resource and at the same time to obtain an acceptable level of recognition we have chosen to use Fast Fourier Transform.
Autorentext
Afifa Abbas acquired her Degree in Electrical and Electronics Engineeringat the BRAC University. She is now working as Technology Security Associate Analyst at Banglalink. She previously worked as IT Intern at Banglalink. She completed the book along with her three co-authors namely Priyanka Dewan, Tasnim Shamma & Raktim Mondol.
Weitere Informationen
- Allgemeine Informationen
- GTIN 09783659806070
- Genre Electrical Engineering
- Sprache Englisch
- Anzahl Seiten 96
- Herausgeber LAP LAMBERT Academic Publishing
- Größe H220mm x B150mm x T6mm
- Jahr 2016
- EAN 9783659806070
- Format Kartonierter Einband
- ISBN 3659806072
- Veröffentlichung 06.01.2016
- Titel Design & Implementation of High Performance Face Recognition System
- Autor Afifa Abbas
- Gewicht 161g