Developing UWB Pulse Generator

A digital glitch monocycle pulse generator in a standard 0.13-mim CMOS technology is designed for breast cancer imaging system. A successful low power pulse generator is proposed whose central frequency is digitally controlled to cover 5.2 GHz. The generator is based on delay gate of Output Split Inverter (OSI). The OSI consists of an inverter with current limiting transistor which controls the biasing voltage digitally. The biasing circuit contains current mirror, PMOS transistor which enables 96.5 ps delay values. A glitch circuit is designed for a monocycle pulse width of 193 ps thought for breast cancer detection application. The proposed generator consumes 369 miw at 200 MHz pulse repetition frequency (PRF), and 1.2 V power supply voltage. Its design layout area amounts 67.2× 43.7 mim2.

Autorentext

I am an Assistant Professor in Computer and Electrical Engineering who graduated at an excellence with honor. I did my Master degree and PhD in Electronics and Communication at Ain Shams Univ., Egypt. I work at the Electronics Research Institute in Egypt as a researcher and now working at King Abdulaziz University; faculty of engineering in KSA.

Klappentext

A digital glitch monocycle pulse generator in a standard 0.13- m CMOS technology is designed for breast cancer imaging system. A successful low power pulse generator is proposed whose central frequency is digitally controlled to cover 5.2 GHz. The generator is based on delay gate of Output Split Inverter (OSI). The OSI consists of an inverter with current limiting transistor which controls the biasing voltage digitally. The biasing circuit contains current mirror, PMOS transistor which enables 96.5 ps delay values. A glitch circuit is designed for a monocycle pulse width of 193 ps thought for breast cancer detection application. The proposed generator consumes 369 w at 200 MHz pulse repetition frequency (PRF), and 1.2 V power supply voltage. Its design layout area amounts 67.2× 43.7 m2.