Digital Watermarking System for Video Authentication using FPGA

A hardware implementation of a digital watermarking system that can insert invisible, semi fragile watermark information into compressed video streams in real time. The watermark embedding is processed in the discrete cosine transform domain. To achieve high performance, the proposed system architecture employs pipeline structure and uses parallelism. Hardware implementation using field programmable gate array has been done, and an experiment was carried out using a custom versatile FPGA Development board for overall performance evaluation. Experimental results show that a hardware-based video authentication system using this watermarking technique features minimum video quality degradation and can withstand certain potential attacks, i.e., cover-up attacks, cropping, and segment removal on video sequences.

Autorentext

Prof. Ashish S. Bhaisare, docente do Departamento EXTC em Shivajirao S. Jondhle College de Engenharia, Asangaon, Universidade de Mumbai, Índia. Obteve o seu mestrado em Electrónica Digital na Universidade de North Maharashtra, Índia. A sua área de interesse em Electrónica Analógica e software de Simulação. A sua área de Investigação em Marca de Água de Vídeo Digital.