Energy-Efficient Communication Processors

This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author's design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes.

Describes a DSIP architecture explicitly for the wireless domain, significantly more efficient than methods commonly in use Includes an efficient DSIP architecture template, which can be reused for specific designs Uses holistic design approach, considering all relevant requirements and combining many innovative/disruptive design concepts Enables design portability, given changing target devices

Inhalt
Context and State-of-the-Art.- Processor Template for the Wireless Domain.- Case Study 1: MIMO Detector.- Case Study 2: FIR Filter.- Case study 3: FFT.- Front-End Design for the Processor Template.- Back-End Design for the Processor Template.