Energy-Efficient Communication Processors

This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures used in the wireless baseband domain. Shows how to reduce development costs and increase scalability. Includes case studies.

Describes a DSIP architecture explicitly for the wireless domain, significantly more efficient than methods commonly in use Includes an efficient DSIP architecture template, which can be reused for specific designs Uses holistic design approach, considering all relevant requirements and combining many innovative/disruptive design concepts Enables design portability, given changing target devices

Inhalt
Context and State-of-the-Art.- Processor Template for the Wireless Domain.- Case Study 1: MIMO Detector.- Case Study 2: FIR Filter.- Case study 3: FFT.- Front-End Design for the Processor Template.- Back-End Design for the Processor Template.