Extreme Temperature Memory Design Using Silicon On Sapphire Technology

This book describes the high temperature memories as part of the design for 275 °C HC11 microcontroller and 200 °C LEON3 processor using the 0.5 um Peregrine SOS CMOS technology, which are suitable for aerospace,well logging, solar controllers, and automotive applications. In this book,we have demonstrated high temperature memories for microprocessor designs using the 0.5um Peregrine SOS CMOS technology, which can be useful for aerospace, well logging, solar controllers, automobile and other high temperature environment applications. The memories were designed with aid from the measured data,addressing write and read stability in the context of floating body effect, kink effect, shrinking ION/IOFF currents. Especially a novel 6T PMOS SRAM cell and a stacked-NMOS sense amp were designed to solve these issues. Also, SRAM design with Encounter support has been demonstrated to be a fast time to market memory design solution.

Autorentext

Zhe Yuan, is a Digital Design Engineer at Peregrine Semicondcutor, and focus on MIPI and SPI interface design using Peregrine SOS process. Zhe received his PhD degree in Electrical Engineering, on Dec. 2011 at Oklahoma State University. His focus during PhD was high temperture memory design for LEON3 and HC11 microprocessors.