Fault-Mitigation Strategies for Reliable FPGA Architecture

Reconfigurable Field Programmable Gate Arrays (FPGAs) are extensively employed in various application domains due to their flexibility, high-density functionality, high performance and low-cost development. However, the challenge that must be tackled during system design is their high susceptibility to the radiation induced faults such as Single Event Effects (SEEs). These radiation induced faults are a major concern in safety and mission critical systems such as automotive and avionics systems. In general, most of today's commercial off-the shelf (COTS) FPGAs are not designed to work under these harsh environments, except for specific circuits that have been radiation-hardened at the fabrication process level, but at a very high cost overhead, which makes them less interesting from an economic and performance point of view. The work presented in this manuscript is a contribution to a multi-partner project, aims to develop a low-cost reliable FPGA architecture with supporting EDA tool-suite that offers a complete environment for a fault tolerant system design.

Autorentext

B. Chagun Basha is a research fellow in the field of fault-tolerant computing and reliable computer architectures. He was associated with CNRS-IETR (Nantes) and INRIS-IRISA (Lannion), France. Prior to that, he worked as a Design Engineer (FPGA Hardware) with Processor Systems (I) Private Limited in Bangalore, India.