FPGA Based Intrusion Detection

PLD, FPGA, CPU, PROCESSOR, LAN, ETHERNET, INTERNET, TCP/IPMPLD, CPLD, PGA, MEMORY, NIC, MAXIMUM TRANSMISSION UNIT, LATENCY, THROUGHPUT, OS, PAP, MEDIUM ACCESS CONTROL, IPV4, IPV6, PHY Physical Layer PLD Programmable Logic Devices PNI Programmable Network Interface PP Protocol Processor PPP Programmable Protocol Processor QoS Quality of Service SAN Storage Area Network SAR Segmentation And Reassembly SSL Secure Socket Layer STCAM Simplified TCAM TCAM Ternary Content Addressable Memory TCP Transport Control Protocol TOE TCP Offload Engine TTL Time to Live UDP User Datagram Protocol ULP Upper Layer Protocol XAC eXtract And Compare XDR External Data Representation

Autorentext

"V.P.Sampath" received Masters degree in Applied Electronics Engineering from Anna University,Chennai.He has worked in Digital vlsi front end in the areas of CDMA,WCDMA.He is the Member of IEEE and Institution of Engineers India Limited. Previously he was with the Telesoft Neutek,Mumbai and he was deputed to Bakrie Telecom,Jakarta,Indonesia.

Klappentext

PLD,FPGA,CPU,PROCESSOR,LAN,ETHERNET,INTERNET,TCP/IPMPLD,CPLD,PGA,MEMORY,NIC,MAXIMUM TRANSMISSION UNIT,LATENCY,THROUGHPUT,OS,PAP,MEDIUM ACCESS CONTROL,IPV4,IPV6,PHY Physical Layer PLD Programmable Logic Devices PNI Programmable Network Interface PP Protocol Processor PPP Programmable Protocol Processor QoS Quality of Service SAN Storage Area Network SAR Segmentation And Reassembly SSL Secure Socket Layer STCAM Simplified TCAM TCAM Ternary Content Addressable Memory TCP Transport Control Protocol TOE TCP Offload Engine TTL Time to Live UDP User Datagram Protocol ULP Upper Layer Protocol XAC eXtract And Compare XDR External Data Representation