Hardware Security

This book provides a look into the future of hardware and microelectronics security, with an emphasis on potential directions in security-aware design, security verification and validation, building trusted execution environments, and physical assurance. The book emphasizes some critical questions that must be answered in the domain of hardware and microelectronics security in the next 5-10 years: (i) The notion of security must be migrated from IP-level to system-level; (ii) What would be the future of IP and IC protection against emerging threats; (iii) How security solutions could be migrated/expanded from SoC-level to SiP-level; (iv) the advances in power side-channel analysis with emphasis on post-quantum cryptography algorithms; (v) how to enable digital twin for secure semiconductor lifecycle management; and (vi) how physical assurance will look like with considerations of emerging technologies. The main aim of this book is to serve as a comprehensive and concise roadmap for new learners and educators navigating the evolving research directions in the domain of hardware and microelectronic securities. Overall, throughout 11 chapters, the book provides numerous frameworks, countermeasures, security evaluations, and roadmaps for the future of hardware security.

Discusses the future of hardware and microelectronics security, the risks, challenges and potential countermeasures Describes a physical design roadmap, incorporating emerging technologies into security solutions Uses security-related metrics to explain how assurance can be quantified, from IP to security levels

Autorentext

Kimia Zamiri Azar is a postdoctoral research associate in the Department of Electrical and Computer Engineering at the University of Florida. She received a Ph.D. degree from the Department of Electrical and Computer Engineering at George Mason University in 2021. She also received her M.S. and B.S. from the Department of Electrical and Computer Engineering at Shahid Beheshti University, 2015, and K. N. T. University, 2013, respectively. Her research interests span hardware security and trust, supply chain security, System-on-Chips security validation and verification, and IoT security. She has multiple publications in high-prestigious journals and conferences, including IEEE Transactions on Computers, IEEE Transactions on VLSI, IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES), and Design Automation Conference (DAC), with awards including nominations for Best Paper Award in IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'20 and IEEE/ACM Conference on Computer-Aided-Design (ICCAD)'21. Hadi Mardani Kamali is a postdoctoral research associate at Florida Institute for Cybersecurity Research (FICS), the Department of Electrical and Computer Engineering at the University of Florida. He received his Ph.D. degree from the Department of Electrical and Computer Engineering at George Mason University, 2021. He received his M.S. and B.S. from the Department of Electrical and Computer Engineering at Sharif University of Technology, 2013, and K. N. T. University, 2011, respectively. His research delves into hardware security with a particular focus on exploiting IP protection techniques, design-for-trust for VLSI circuits, and CAD frameworks for security (design-for-security), in which he has numerous publications in top journals and conferences including IEEE Transactions on Computers, IEEE Transactions on VLSI, IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES), and Design Automation Conference (DAC),with awards including nominations for Best Paper Award in ISVLSI'20, ICCAD'20, ICCAD'21, and IEEE CAS 2020. Farimah Farahmandi is an assistant professor in the Department of Electrical and Computer Engineering at the University of Florida. She received her Ph.D. from the Department of Computer and Information Science and Engineering at the University of Florida, 2018. She received her B.S. and M.S. from the Department of Electrical and Computer Engineering at the University of Tehran, Iran, in 2010 and 2013, respectively. Her research interests include design automation of System-on-Chips and energy-efficient systems, formal verification, hardware security validation, and post-silicon validation and debug. Her research has resulted in two books, seven book chapters, and several publications in premier ACM/IEEE journals and conferences, including IEEE Transactions on Computers, IEEE Transactions on CAD, Design Automation Conference (DAC), and Design Automation and Test inEurope (DATE). Her research has been recognized by several awards, including IEEE System Validation and Debug Technology Committee Student Research Award, Gartner Group Info-Tech Scholarship, a nomination for the Best Paper Award in ASPDAC 2017, and DAC Richard Newton Young Student Fellowship. She has actively collaborated with various research groups (IBM, Intel, and Cisco) that have led to several joint publications. She currently serves as an Associate Editor of IET Computers & Digital Techniques. She also has served on many technical program committees as well as organizing committees of premier ACM and IEEE conferences. Her research has been sponsored by SRC, AFRL, DARPA, and Cisco. She is a member of IEEE and ACM. Mark Tehranipoor received his Ph.D. from the University of Texas at Dallas in 2004. He is currently the Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity at the University of Florida. His current research projects include: hardware security and trust, supply chain

Inhalt

Chapter 1 Quantifiable Assurance in Hardware.- Chapter 2 Advances in Logic Locking.- Chapter 3 Rethinking Hardware Watermark.- Chapter 4 SoC Security Verification using Fuzz, Penetration, and AI Testing.- Chapter 5 Runtime SoC Security Validation.- Chapter 6 Large Language Models for SoC Security.- Chapter 7 Power Side-channel Evaluation in Post-Quantum Cryptography.- Chapter 8 Digital Twin for Secure Semiconductor Lifecycle Management.- Chapter 9 Secure Physical Design.- Chapter 10 Secure Heterogeneous Integration.- Chapter 11 Materials for Hardware Security.