Heteroepitaxial Ge on Si Using III-V Buffers

Mitigating the power concerns involved with the aggressive shrinking of silicon (Si) based complementary metal-oxide-semiconductor (CMOS) transistors requires the adoption of high-mobility, alternative materials such as Germanium (Ge). Although the use of Ge in bulk form is cost-prohibitive, creative methods such as the application of Ge on to Si substrate via a buffer layer "bridge" helps drive the feasibility of the use of Ge for novel, low-power applications using standard CMOS processes. This work explores the electrical and material characteristics of MOS capacitors fabricated on crystallographic Ge integrated on to Si substrate via AlAs/GaAs buffers. Electrical characteristics of different crystallographically oriented Ge integrated on AlAs/GaAs buffers and the tunability of a key device characteristic known as threshold voltage is demonstrated as well. Thus, this research demonstrates the feasibility of the use of Ge integrated on Si via AlAs/GaAs buffer layers for high-speed, low-power electronic devices.

Autorentext

Peter Nguyen earned his Bachelors of Science from Virginia Polytechnic Institute and State University in 2014 and his Masters of Science from Virginia Polytechnic Institute and State University in 2016. He is a 2014 National Science Foundation Graduate Research Fellow. He currently resides in Hillsboro, OR, where he works at Intel.