High-speed Serial Buses in Embedded Systems

Focuses on a collection of high-speed serial buses

Covers nine serial buses frequently used in embedded systems

Provides a detailed exploration of related protocols, including the physical layer, link synchronization, frame format, and application command

Offers step-by-step implementation guidelines, with FPGA project examples, analysis of RTL code, experimental results, and an in-depth optimization scheme not available elsewhere

Focuses on a collection of high-speed serial buses Covers nine serial buses frequently used in embedded systems Provides a detailed exploration of related protocols, including the physical layer, link synchronization, frame format, and application command Offers step-by-step implementation guidelines, with FPGA project examples, analysis of RTL code, experimental results, and an in-depth optimization scheme not available elsewhere

Autorentext
Dr. Zhang Feng is a Senior Engineer. His research areas include data recording systems such as CCD, SATA, SRIO, FC and CPCIE, as well as the design of embedded systems used in wireless communication, including SerDes, JESD204, Aurora, and VPX.

Inhalt
The History and Development of Bus.- The High-Speed Data Transfer based on SERDES.- ADC/DAC Data Transfer Based on JESD204 Protocol.- The High-speed Communication Architecture in SRIO.- The High-speed Data Transfer based on PCIE.- The High-speed Data Transfer based on Aurora.- A High-speed Data Recording Scheme based on SATA Protocol.- The Communication Structure of CompactPCI Express.- The Communication Structure of VPX.- The Implementation and Application of FC Protocol.- The Implementation and Application of Infiniband Protocol.- Appendixes.