Improvement of Effective Architectures for Discrete Wavelet Transform

Focusing on the intensive computations involved in the discrete wavelet transform (DWT), the design of efficient hardware architectures for a fast computation of the transform has become imperative, especially for real-time applications. This revision presents an overview of the one dimension (1D) and two dimension (2D) DWT implementation structures and computational intricacies. The principles governing the DWT was concisely assessed to recover the understanding of the numerous implementation approaches and structures with the goal of drastically lowering the power consumption and hardware cost of proposal.

Autorentext

Khamees Khalaf Hanan Al-jumaily, received the Bachelor's B.Sc. and Master M.Sc. degrees in Electrical Engineering and in Communication Engineering from University Of Technology in Baghdad, Iraq in 1985 and 2005, respectively. He completed his Ph.D. degree in image coding for FPGA applications, in June 2015 from the Universiti Sains Malaysia (USM).