Introduction to Junctionless Double Gate MOSFET

The field effect transistors (FETs) fabricated in integrated circuits are majorly with junctions. Due to the device scaling down, the fabrication of these junctions has become gradually more difficult. Also, there is a stringent necessity for having high doping concentration gradient for the smooth functioning of the device. Recently, researchers are focusing on new devices where devices are junction less and no doping gradient requirement. One such structure is the junctionless double gate MOSFET (JL-DG MOSFET) which has shown improved performance against short channel effect, namely drain induced barrier lowering (DIBL), changes in threshold voltage etc.

Autorentext

Gaurav Dhiman wurde 1981 in Pathankot, Indien, geboren. Er erhielt 2003 den B.Tech.-Abschluss in Elektronik und Kommunikationstechnik von der Punjab Technical University, Jalandhar, Indien, und 2011 und 2018 den M.Tech.- und Ph.D.-Abschluss in VLSI-Design von der Mody University of Science and Technology (MUST) Lakshmangarh, Rajasthan, Indien.