Investigation on Schottky-Barrier MOSFETs for Memory Application

The structure of Schottky-barrier (SB) MOSFETs was investigated for both the perspective of practical applications and interest in novel Flash memory. We demonstrated how the source-side injection of hot electrons in the dopant-segregated SB (DSSB) Flash memory cell achieves high-speed, low-voltage programming with excellent injection efficiency, and no constraints on the optimization of gate and drain voltages. Moreover, the drain disturbance-free phenomenon in NOR Flash architecture was achieved. Excellent programming efficiency, especially, was achieved in a DSSB Flash device with a narrow fin width due to an enhanced lateral electric field without any sacrifice of parasitic resistance. Thus, the DSSB device can be a promising candidate in NOR Flash memory for attaining a lower programming voltage and power consumption.

Autorentext

Sung-Jin Choi is currently working toward the Ph.D. degree in the department of electrical engineering, KAIST, Daejeon, Korea. His current research interests include Schottky-barrier devices, capacitor-less DRAM, bio-sensors, and nanowire electronics.