Next Generation MRAM Development

Only recently has the possibility of a universal memory, a fast random access memory that retains its state during complete power-down, turned into a realizable opportunity. Such a memory can eliminate static power, improve system reliability in the face of power interruption, and eliminate the need for a separate FLASH memory module, reducing system component count. One candidate in the race for a universal memory is magnetoresistive random access memory (MRAM). In the development of MRAM, design challenges related to isolating memory elements, obtaining a compatible operating point with CMOS technology, and sensing data reliably have emerged. Therefore, there still exists a barrier to achieving the cost and performance characteristics of traditional volatile solid state memories---SRAM and DRAM. In this work, a 4kb MRAM array is designed to evaluate the feasibility of a promising new form of MRAM based on the phenomenon of spin torque transfer switching. The design of the test site and measurement setup is discussed, showing how to explore a multidimensional parameter space of operating conditions to obtain a viable design point for the next generation of MRAM technology.

Autorentext

Masood Qazi is a Ph.D. candidate at the Massachusetts Institute of Technology. He received the M.Eng. degree in Electrical Engineering and Computer Science in 2007 and the Bachelor of Science degrees in both Physics and Electrical Science and Engineering in 2006 from MIT. Masood's research interests include circuit design for semiconductor memory.