Physical Design Essentials

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Details

Physical Design Essentials is arranged in a format that follows the industry-common ASIC physical design flow. Its target audience is today's physical design engineers or professionals in the ASIC area that are expected to be conversant with all aspects of ASIC design implementation stages including device processes, library development, place-and-route algorithms, verification and testing. It begins with general concepts of an ASIC library, then covers floor planning, placement, routing, verification, and finally, testing.

Topics covered include: Basic standard cell design, transistor-sizing, and layout styles; Linear, non-linear, and polynomial characterization; Physical design constraints and floor planning styles; Algorithms used for placement Clock Tree Synthesis; Algorithms used for global and detailed routing; parasitic extraction; Functional timing and physical methods of verification; Electronic Testing.


Offers a basic understanding of all steps that are required by physical design Provides a complete framework through which the design process can be executed Includes supplementary material: sn.pub/extras

Klappentext

Physical Design Essentials explains the basic steps required in the physical design of Application Specific Integrated Circuits (ASICs). The subject matter presentation follows the industry-common ASIC physical design flow.

Topics covered include:

  • Basic standard cell design, transistor-sizing, and layout styles

  • Linear, non-linear, and polynomial characterization

  • Physical design constraints and floor planning styles

  • Algorithms used for placement

  • Clock tree synthesis

  • Algorithms used for global and detailed routing

  • Parasitic extraction

  • Functional timing and physical methods of verification

  • Testing Techniques

    Physical Design Essentials is written for professional design engineers who need to be conversant with all aspects of ASIC design implementation: device processes, library development, place-and-route algorithms, verification, and testing.

    Inhalt
    Libraries.- Floorplanning.- Placement.- Routing.- Verification.- Testing.

Weitere Informationen

  • Allgemeine Informationen
    • GTIN 09780387366425
    • Genre Elektrotechnik
    • Auflage 2007 edition
    • Sprache Englisch
    • Lesemotiv Verstehen
    • Anzahl Seiten 212
    • Größe H234mm x B156mm x T14mm
    • Jahr 2007
    • EAN 9780387366425
    • Format Fester Einband
    • ISBN 978-0-387-36642-5
    • Veröffentlichung 03.05.2007
    • Titel Physical Design Essentials
    • Autor Khosrow Golshan
    • Untertitel An ASIC Design Implementation Perspective
    • Gewicht 503g
    • Herausgeber SPRINGER VERLAG GMBH

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