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Routing Algorithms in Networks-on-Chip
Details
This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs).
Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems Describes routing algorithms for NoC architectures at all abstraction levels, from the algorithmic level to actual implementation Discusses the impact on NoC routing algorithms of key design objectives, such as power dissipation, energy consumption, thermal aspects, reliability, and performance
Inhalt
Part I Performance Improvement.- Basic Concepts on On-Chip Networks.- A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs.- Run-Time Deadlock Detection.- The Abacus Turn Model.- Learning-based Routing Algorithms for on-Chip Networks.- Part II Multicast Communication.- Efficient and Deadlock-Free Tree-based Multicast Routing Method for Network-on-Chip.- Path-based Multicast Routing for 2D and 3D Mesh Networks.- Part III Fault Tolerance and Reliability.- Fault-Tolerant Routing Algorithms in Networks-on-Chip.- Reliable and Adaptive Algorithms for 2D and 3D Networks-on-Chip.
Weitere Informationen
- Allgemeine Informationen
- GTIN 09781493955114
- Lesemotiv Verstehen
- Genre Electrical Engineering
- Auflage Softcover reprint of the original 1st ed. 2014
- Editor Masoud Daneshtalab, Maurizio Palesi
- Sprache Englisch
- Anzahl Seiten 424
- Herausgeber Springer New York
- Größe H235mm x B155mm x T22mm
- Jahr 2016
- EAN 9781493955114
- Format Kartonierter Einband
- ISBN 149395511X
- Veröffentlichung 23.08.2016
- Titel Routing Algorithms in Networks-on-Chip
- Gewicht 716g