Scalable and Near-Optimal Design Space Exploration for Embedded Systems

This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.

Describes design space exploration (DSE) methodologies for data storage and processing in embedded systems, which achieve near-optimal solutions with scalable exploration time Presents a set of principles and the processes which support the development of the proposed scalable and near-optimal methodologies Enables readers to apply scalable and near-optimal methodologies to the intra-signal in-place optimization step for both regular and irregular memory accesses Includes supplementary material: sn.pub/extras

Inhalt
Introduction & Motivation.- Reusable DSE methodology for scalable & near-optimal frameworks.- Part I Background memory management methodologies.- Development of intra-signal in-place methodology.- Pattern representation.- Intra-signal in-place methodology for non-overlapping scenario.- Intra-signal in-place methodology for overlapping scenario.- Part II Processing related mapping methodologies.- Design-time scheduling techniques DSE framework.- Methodology to develop design-time scheduling techniques under constraints.- Design Exploration Methodology for Microprocessor & HW accelerators.- Conclusions & Future Directions.