Subthreshold Surface Potential Model for Short-Channel Mosfet

As a result of aggressive downscaling, short-channel effects (SCEs) become a major threat for future downscaling especially in the sub-100nm region. In order to extend the International Technology Road-map for Semiconductors (ITRS) road-map beyond 100nm, Double-Gate (DG) MOSFET evinces himself as a major promising candidate due to its higher scaling capability. In this book, modelling using a pseudo- two-dimensional (2D) analysis was presented to explore the effect of scaling especially for subthreshold characteristics of short-channel DG and conventional single gate MOSFET.

Autorentext

Angsuman Sarkar received his M.Tech degree in VLSI & Microelectronics from Jadavpur University. His research interest span around nano device modeling. He is a life member of ISTE,IE(India)and member of IEEE-Electron Device Society. He has authored many books and number of research papers in national and international journals and conferences.