System-Level Validation

This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. It helps reader avoid time-consuming and error-prone validation methodologies.

Provides a comprehensive introduction to system-level validation Describes high-level modeling using SystemC, UML and transaction-level models Includes coverage of high-level modeling and directed test generation techniques as well efficient validation methodology using directed tests and assertions Shows how to assure consistency between models with test/assertion refinement and reuse techniques across different levels of abstraction Includes supplementary material: sn.pub/extras

Inhalt
Introduction.- Modeling and Specification of SoC Designs.- Automated Generation of Directed Tests.- Functional Test Compaction.- Property Clustering and Learning Techniques.- Decision Ordering Based Learning Techniques.- Synchronized Generation of Directed Tests.- Learning-Oriented Property Decomposition Approaches.- Directed Test Generation for Multicore Architectures.- Test Generation for Cache Coherence Validation.- Reuse of System-Level Tests for Implementation Validation.- Conclusion.