The Verilog(r) Hardware Description Language

This edition presents the new IEEE 1364-2001 standard of The Verilog Hardware Description Language. It offers updated examples that illustrated the new features of the language as well as a cross- referenced guide to the new and old features.

XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("

Presents the language using a tutorial approach Provides numerous examples that allow the reader to learn by example Includes a tutorial introduction to the language, a rigorous presentation of the language's modeling constructs, and the more specialized topics of the language Includes supplementary material: sn.pub/extras

Klappentext

Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog.
The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design.
The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.

Inhalt
Verilog A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.