Understanding sub-threshold SCL for ultra-low power application

The book focuses on the applicability of sub-threshold source coupled logic ( STSCL ) for implementing digital circuits and systems that runs at very low voltage and promise to provide desirable performance with excellent energy savings for Sectors like bio-engineering and smart sensors development where energy consumption is required to be effectively low for longer battery life. Alongside achieving ultra-low power specification, the system must also be reliable, robust and perform under harsh conditions. In this paper logic gates are designed and analyzed, using STSCL, for implementation of digital sections in small sized smart-dust sensors which should operate at very small supply and consume extremely low power.

Autorentext

Sajib Roy, completed MSc in Electrical Engineering, Linköping University, Sweden. Completed Bachelors in Electrical and Electronic Engineering, East West University, Bangladesh. Lecturer, Primeasia University, Bangladesh.