VHDL-Simulation und -Synthese

The expanded 8th edition of this standard textbook supplements the book's previous presentation of VHDL simulation with detailed user instructions for the ModelSim VHDL simulator. It also presents the application of the simulation and synthesis tool Vivado, as required to implement VHDL code in the Xilinz firm's new FPGAs. Selected examples illustrate and describe implementations for Artix FPGAs.

Autorentext

Jürgen Reichardt, Bernd Schwarz, HAW Hamburg.