X2APIC
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Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. The x2APIC architecture provides backward compatibility to the Intel APIC Architecture/xAPIC architecture and forward extendability for future Intel platform innovations. The Intel APIC Architecture is a system of Advanced Programmable Interrupt Controllers (APICs) designed by Intel for use in Symmetric Multi-Processor (SMP) computer systems. It was originally implemented by the Intel 82093AA and 82489DX, and is found in most x86 SMP motherboards. It is one of several attempts to solve interrupt routing efficiency issues in multiprocessor computer systems. There are two components in the Intel APIC system, the Local APIC (LAPIC) and the I/O APIC. There is one LAPIC in each CPU in the system. There is typically one I/O APIC for each peripheral bus in the system.
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GarantieWeitere Informationen
- Allgemeine Informationen
- GTIN 09786130584290
- Editor Lambert M. Surhone, Miriam T. Timpledon, Susan F. Marseken
- Größe H220mm x B220mm
- EAN 9786130584290
- Format Fachbuch
- Titel X2APIC
- Herausgeber Betascript Publishing
- Anzahl Seiten 80
- Genre Informatik
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